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Articles in journal or book chapters
2014
  1. Quentin Colombet, Florian Brandner, and Alain Darte. Studying Optimal Spilling in the Light of SSA. ACM Transactions on Architecture and Code Optimization (ACM TACO), October 2014.


2013
  1. Florian Brandner and Quentin Colombet. Elimination of Parallel Copies Using Code Motion on Data Dependence Graphs. Computer Languages, Systems, and Structures, 39(1):25 - 47, 2013. [WWW]


  2. Naznin Fauzia, Venmugil Elango, Mahesh Ravishankar, J. Ramanujam, Fabrice Rastello, Atanas Rountev, Louis-Noël Pouchet, and P. Sadayappan. Beyond Reuse Distance Analysis: Dynamic Analysis for Characterization of Data Locality Potential. Transactions on Architecture and Code Optimization, 10(4), December 2013. [WWW]


  3. Laure Gonnord and Peter Schrammel. Abstract Acceleration in Linear Relation Analysis. Science of Computer Programming, 2013. Note: In press, Available online 10 October 2013, author version : http://hal.inria.fr/hal-00787212/en. [WWW] [doi:10.1016/j.scico.2013.09.016]


2012
  1. Christophe Alias, Bogdan Pasca, and Alexandru Plesco. FPGA-Specific Synthesis of Loop Nests with Pipelined Computational Cores. Microprocessors and Microsystems - Embedded Hardware Design, 36(8):606-619, 2012.


  2. Benoit Boissinot, Philip Brisk, Alain Darte, and Fabrice Rastello. SSI Properties Revisited. ACM Transactions on Embedded Computing Systems, 11S(1), June 2012. Note: Article 21, 23 pages.


  3. Paul Feautrier, Abdoulaye Gamatié, and Laure Gonnord. Enhancing the Compilation of Synchronous Dataflow Programs with a Combined Numerical-Boolean Abstraction. CSI Journal of Computing, 1(4):8:86 - 8:99, 2012.


2011
  1. Alain Darte. Optimal Parallelism Detection in Nested Loops. In David Padua, editor, Encyclopedia of Parallel Programming. Springer, 2011.


  2. Paul Feautrier. Array Layout for Parallel Processing. In David Padua, editor, Encyclopedia of Parallel Programming. Springer, 2011.


  3. Paul Feautrier. Bernstein's Conditions. In David Padua, editor, Encyclopedia of Parallel Programming. Springer, 2011.


  4. Paul Feautrier. Dependences. In David Padua, editor, Encyclopedia of Parallel Programming. Springer, 2011.


  5. Paul Feautrier and Christian Lengauer. The Polyhedron Model. In David Padua, editor, Encyclopedia of Parallel Programming. Springer, 2011.


  6. Marie Rastello, Fabrice Rastello, Hervé Bellot, Frédéric Ousset, François Dufour, and Lorenz Meier. Size of Snow Particles in a Powder-Snow Avalanche. Journal of Glaciology, 57(201):151-156(6), March 2011. Keyword(s): Fluid mechanics, Image processing.


2009
  1. Philippe Grosse, Yves Durand, and Paul Feautrier. Methods for Power Optimization in SOC-Based Data Flow Systems. ACM Transactions on Design Automation of Electronic Systems, 14(3):1-20, 2009. [doi:http://doi.acm.org/10.1145/1529255.1529260]


2008
  1. Alain Darte. Quelques propriétés mathématiques et algorithmiques des ensembles convexes. Énoncé et corrigé de l'épreuve de mathématiques et informatique, concours d'entrée aux ENS de Cachan, Lyon et Ulm, session 2008. Revue de Mathématiques Spéciales, 119(1), 2008.


2007
  1. Paul Feautrier. Les Compilateurs. In Jean-Eric Pin, editor, Encyclopédie de l'Informatique. Vuibert, 2007.


  2. Hadda Cherroun, Alain Darte, and Paul Feautrier. Reservation Table Scheduling: Branch-and-Bound Based Optimization vs. Integer Linear Programming Techniques. RAIRO-OR, 41(4):427-454, December 2007. [doi:www.edpsciences.org/10.1051/ro:2007036]


  3. Antoine Fraboulet and Tanguy Risset. Master Interface for On-Chip Hardware Accelerator Burst Communications. Journal of VLSI Signal Processing, 2(1):73-85, 2007.


  4. Antoine Scherrer, Nicolas Larrieu, Pierre Borgnat, Philippe Owezarski, and Patrice Abry. Non Gaussian and Long Memory Statistical Characterisations for Internet Traffic with Anomalies. IEEE Transactions on Dependable and Secure Computing (TDSC), 4(1):56-70, 2007.


2006
  1. Paul Feautrier. Scalable and Structured Scheduling. International Journal of Parallel Programming, 34(5):459-487, October 2006.


2005
  1. Cédric Bastoul and Paul Feautrier. Adjusting a Program Transformation for Legality. Parallel Processing Letters, 15(1-2):3-17, March-June 2005.


  2. Alain Darte and Guillaume Huard. New Complexity Results on Array Contraction and Related Problems. Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology, 40(1):35-55, May 2005.


  3. Alain Darte, Robert Schreiber, and Gilles Villard. Lattice-Based Memory Allocation. IEEE Transactions on Computers, 54(10):1242-1257, October 2005. Note: Special Issue, Tribute to B. Ramakrishna (Bob) Rau.


  4. Christophe Guillon, Fabrice Rastello, Thierry Bidault, and Florent Bouchez. Procedure Placement using Temporal-Ordering Information: Dealing with Code Size Expansion. Journal of Embedded Computing, 1(4):437-459, 2005.


2003
  1. S. Derrien, A. C. Guillou, P. Quinton, T. Risset, and C. Wagner. Automatic Synthesis of Efficient Interfaces for Compiled Regular Architectures. In Domain-Specific Embedded Multiprocessors, chapter 7, pages 127-150. Marcel Dekker, 2003.


  2. F. Dupont de Dinechin, M. Manjunathaiah, T. Risset, and M. Spivey. Design of Highly Parallel Architectures with Alpha and Handel. In System Specification and Design Languages (best of FDL'02). Kluwer, 2003.


  3. Daniel Chavarría-Miranda, Alain Darte, Robert Fowler, and John Mellor-Crummey. Generalized Multipartitioning of Multi-Dimensional Arrays for Parallelizing Line-Sweep Computations. Journal of Parallel and Distributed Computing, 63(9):887-911, 2003. Note: Special issue of best papers from IPDPS'02.


  4. Fabrice Rastello, Amit Rao, and Santosh Pande. Optimal Task Scheduling to Minimize Inter-Tile Latencies. Parallel Computing, 29(2):209-239, February 2003.


2002
  1. Olivier Beaumont, Vincent Boudet, Arnaud Legrand, Fabrice Rastello, and Yves Robert. Static Data Allocation and Load Balancing Techniques for Heterogeneous Systems. In C.K. Yuen, editor, Annual Review of Scalable Computing, volume 4, chapter 1, pages 1-37. World Scientific, 2002.


  2. Olivier Beaumont, Vincent Boudet, Fabrice Rastello, and Yves Robert. Partitioning a Square into Rectangles: NP-Completeness and Approximation Algorithms. Algorithmica, 34:217-239, 2002.


  3. Alain Darte and Jean Mairesse. Énoncé et corrigé de l'épreuve de mathématiques et informatique, concours d'entrée aux ENS d'Ulm et Lyon, session 2002. Revue de Mathématiques Spéciales, 113(2):47-83, December 2002.


  4. Alain Darte, Rob Schreiber, Bob Ramakrishna Rau, and Frédéric Vivien. Constructing and Exploiting Linear Schedules with Prescribed Parallelism. ACM Transactions on Design Automation of Electronic Systems, 7(1):159-172, 2002.


  5. Fabrice Rastello and Yves Robert. Automatic Partitioning of Parallel Loops with Parallelepiped-Shaped Tiles. IEEE Transactions on Parallel and Distributed Systems, 13(5):460-470, May 2002.


2001
  1. Alain Darte, Yves Robert, and Frédéric Vivien. Loop Parallelization Algorithms. In Santosh Pande, editor, Compiler Optimizations for Scalable Parallel Systems: Languages, Compilation Techniques, and Run Time Systems, volume 1808 of Lecture Notes in Computer Science, pages 141-172. Springer Verlag, 2001.


  2. Paul Feautrier. Array Dataflow Analysis. In Santosh Pande, editor, Compiler Optimizations for Scalable Parallel Systems: Languages, Compilation Techniques, and Run Time Systems, volume 1808 of Lecture Notes in Computer Science, pages 173-216. Springer Verlag, 2001.


  3. Olivier Beaumont, Vincent Boudet, Antoine Petitet, Fabrice Rastello, and Yves Robert. A Proposal for a Heterogeneous Cluster ScaLAPACK (Dense Linear Solvers). IEEE Transactions on Computers, 50(10):1052-1070, 2001.


  4. Olivier Beaumont, Vincent Boudet, Fabrice Rastello, and Yves Robert. Matrix Multiplication on Heterogeneous Platforms. IEEE Transactions on Parallel and Distributed Systems, 12(10):1033-1051, 2001.


  5. Olivier Beaumont, Arnaud Legrand, Fabrice Rastello, and Yves Robert. Dense Linear Algebra Kernels on Heterogeneous Platforms: Redistribution Issues. Parallel Computing, 28:155-185, 2001.


  6. Olivier Beaumont, Arnaud Legrand, Fabrice Rastello, and Yves Robert. Static LU Decomposition on Heterogeneous Platforms. International Journal of High Performance Computing Applications, 15(3):310-323, 2001.


  7. Vincent Boudet, Fabrice Rastello, and Yves Robert. Alignment and Distribution is NOT (Always) NP-Hard. Journal of Parallel and Distributed Computing, 61:501-519, 2001.


  8. S. Rajopadhye, T. Risset, and T. Tadonki. Le chemin algébrique sur réseaux linéaires. Technique et science informatiques, 20(5):655-676, 2001. [WWW]


2000
  1. Alain Darte. On the Complexity of Loop Fusion. Parallel Computing, 26(9):1175-1193, July 2000.


  2. Alain Darte and Guillaume Huard. Loop Shifting for Loop Compaction. International Journal of Parallel Programming, 28(5):499-534, 2000.


  3. Paul Feautrier. Les compilateurs. Technique et science informatiques, 19(1--3):223-232, 2000.


  4. Martin Griebl, Paul Feautrier, and Christian Lengauer. Index Set Splitting. International Journal of Parallel Programming, 28(6):607-631, 2000.


  5. E. Mémin and T. Risset. On the Study of VLSI Derivation for Optical Flow Estimation. International Journal of Pattern Recognition and Artificial Intelligence (IJPRAI), 14(4):441-462, June 2000. [WWW]


  6. E. Mémin and T. Risset. VLSI Design Methodology for Edge-Preserving Image Reconstruction. Real-Time Imaging, 2000. Note: Special issue on Fast Energy Minimization-Based Imaging and Vision Techniques. [WWW]


  7. Xavier Redon and Paul Feautrier. Detection of Scans in the Polytope Model. Parallel Algorithms and Applications, 15:229-263, 2000.


  8. C. Tayou Djamegni, P. Quinton, S. Rajopadhye, and T. Risset. Derivation of Systolic Algorithms for the Algebraic Path Problem by Recurrence Transformations. Parallel Computing, 26:1429-1445, 2000. [WWW]


1999
  1. A. Mignotte and O. Peyran. Reducing the Complexity of an ILP Formulation for Synthesis. In F. Catthoor and al., editors, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. IEEE Circuit and System Society, 1999. Note: Special Issue on System Level Synthesis and Design.


  2. Pierre Boulet, Jack Dongarra, Fabrice Rastello, Yves Robert, and Frédéric Vivien. Algorithmic Issues on Heterogeneous Computing Platforms. Parallel Processing Letters, 9(2):197-213, 1999.


1998
  1. Alain Darte. Mathematical Tools for Loop Transformations: From Systems of Uniform Recurrence Equations to the Polytope Model. In M. H. Heath, A. Ranade, and R. S. Schreiber, editors, Algorithms for Parallel Processing, volume 105 of IMA Volumes in Mathematics and its Applications, pages 147-183. Springer Verlag, 1998.


  2. Pierre Boulet, Alain Darte, Georges-André Silber, and Frédéric Vivien. Loop Parallelization Algorithms: From Parallelism Extraction to Code Generation. Parallel Computing, 24(3):421-444, 1998.


  3. Pierre-Yves Calland, Alain Darte, and Yves Robert. Circuit Retiming Applied to Decomposed Software Pipelining. IEEE Transactions on Parallel and Distributed Systems, 9(1):24-35, January 1998.


  4. Pierre-Yves Calland, Alain Darte, Yves Robert, and Frédéric Vivien. On the Removal of Anti and Output Dependences. International Journal of Parallel Programming, 26(3):285-312, 1998.


  5. Alain Darte. Énoncé et corrigé de l'épreuve de mathématiques et informatique, concours d'entrée aux ENS de Cachan et Lyon, session 1997. Revue de Mathématiques Spéciales, 108(8):881-906, April 1998.


  6. Frédéric Desprez, Jack Dongarra, Fabrice Rastello, and Yves Robert. Determining the Idle Time of a Tiling: New Results. Journal of Information Science and Engineering, 14:167-190, 1998.


1997
  1. T. Gautier, P. Le Guernic, P. Quinton, S. Rajopadhye, T. Risset, and I. Smarandache. Le projet Cairn : vers la conception d'architectures à partir de Signal et Alpha. In Collection technique et scientifique des télécommunications. CNET, 1997.


  2. Pierre-Yves Calland, Alain Darte, Yves Robert, and Frédéric Vivien. Plugging Anti and Output Dependence Removal Techniques into Loop Parallelization Algorithms. Parallel Computing, 23(1):251-266, 1997.


  3. Alain Darte, Georges-André Silber, and Frédéric Vivien. Combining Retiming and Scheduling Techniques for Loop Parallelization and Loop Tiling. Parallel Processing Letters, 7(4):379-392, 1997.


  4. Alain Darte and Frédéric Vivien. On the Optimality of Allen and Kennedy's Algorithm for Parallelism Detection in Nested Loops. Journal of Parallel Algorithms and Applications, 12(1-3):83-112, June 1997.


  5. Alain Darte and Frédéric Vivien. Optimal Fine and Medium Grain Parallelism Detection in Polyhedral Reduced Dependence Graphs. International Journal of Parallel Programming, 25(6):447-496, December 1997.


  6. Alain Darte and Frédéric Vivien. Parallelizing Nested Loops with Approximation of Distance Vectors: A Survey. Parallel Processing Letters, 7(2):133-144, July 1997.


  7. P. Quinton, S. V. Rajopadhye, and T. Risset. On Manipulating Z-polyhedra using a Canonical Representation. Parallel Processing Letters, 7(2):181-194, June 1997. [WWW]


1996
  1. A. Darte, F. Desprez, J.-C. Mignot, and Y. Robert. TransTool: A Restructuring Tool for the Parallelization of Applications using High Performance Fortran. Journal of the Brazilian Computer Society, 3(2):5-15, 1996.


  2. Alain Darte, Michèle Dion, and Yves Robert. A Characterization of One-to-One Modular Mappings. Parallel Processing Letters, 5(1):145-157, 1996.


1995
  1. Vincent Bouchitté, Pierre Boulet, Alain Darte, and Yves Robert. Evaluating Array Expressions on Massively Parallel Machines with Communication/Computation Overlap. International Journal of Supercomputer Applications and High Performance Computing, 9(3):205-219, 1995.


  2. Alain Darte and Yves Robert. Affine-by-Statement Scheduling of Uniform and Affine Loop Nests over Parametric Domains. Journal of Parallel and Distributed Computing, 29:43-59, 1995.


  3. Alain Darte and Frédéric Vivien. Revisiting the Decomposition of Karp, Miller, and Winograd. Parallel Processing Letters, 5(4):551-562, 1995.


1994
  1. Pierre Boulet, Alain Darte, Tanguy Risset, and Yves Robert. (Pen)-Ultimate Tiling?. Integration, the VLSI journal, 17(1):33-51, 1994.


  2. Alain Darte and Yves Robert. Constructive Methods for Scheduling Uniform Loop Nests. IEEE Transactions on Parallel and Distributed Systems, 5(8):814-822, 1994.


  3. Alain Darte and Yves Robert. Mapping Uniform Loop Nests onto Distributed Memory Architectures. Parallel Computing, 20:679-710, 1994.


  4. Alain Darte and Yves Robert. On the Alignment Problem. Parallel Processing Letters, 4(3):259-270, 1994.


  5. M. Dion, T. Risset, and Y. Robert. Ressource-Constrained Scheduling of Partitioned Algorithms on Processor Arrays. Integration the VLSI journal, 20:139-159, 1994. [WWW]


1993
  1. A. Darte, T. Risset, and Y. Robert. Formal Methods for Solving the Algrebraic Path Problem. In L. Svensson F. Catthoor, editor, Application-Driven Architecture Synthesis, chapter 3, pages 47-69. Kluwer Academic Publishers, 1993.


  2. J.F. Collard, P. Feautrier, and T. Risset. Construction of DO Loops from Systems of Affine Constraints. Parallel Processing Letters, 5:421-436, 1993. [WWW]


1991
  1. Alain Darte. Regular Partitioning for Synthesizing Fixed-Size Systolic Arrays. INTEGRATION, The VLSI Journal, 12:293-304, December 1991.


  2. Alain Darte, Leonid Khachiyan, and Yves Robert. Linear Scheduling is Nearly Optimal. Parallel Processing Letters, 1(2):73-81, 1991.


  3. T. Risset and Y. Robert. Synthesis of Processor Arrays for the Algebraic Path Problem: Unifying Old Results and Deriving New Architectures. Parallel Processing Letters, 1:19-28, 1991.


1990
  1. T. Risset. Implementing Gaussian Elimination on a Matrix-Matrix Multiplication Systolic Array. Parallel Computing, 16:351-359, 1990.



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Last modified: Tue Dec 30 15:51:02 2014
Author: darte.

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