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Internal reports
2013
  1. Paul Feautrier, Abdoulaye Gamatié, and Laure Gonnord. Enhancing the Compilation of Synchronous Dataflow Programs with a Combined Numerical-Boolean Abstraction. Report 2nd Version, July 2013. Note: Last version = author version of our CSI Journal of Computer Paper (same title and same content). [WWW]


2012
  1. Guillaume Andrieu, Christophe Alias, and Laure Gonnord. Modular Termination of C programs. Research Report 8166, INRIA, 12 2012. [WWW]


2011
  1. Christophe Alias, Alain Darte, and Alexandru Plesco. Kernel Offloading with Optimized Remote Accesses. Research Report RR-7697, INRIA, July 2011. [WWW]


  2. Christophe Alias, Alain Darte, and Alexandru Plesco. Program Analysis and Source-Level Communication Optimizations for High-Level Synthesis. Research Report RR-7648, INRIA, June 2011. [WWW]


  3. Christophe Alias, Bogdan Pasca, and Alexandru Plesco. FPGA-Specific Synthesis of Loop-Nests with Pipelined Computational Cores. Research Report RR-7674, INRIA, July 2011. [WWW]


  4. Florian Brandner, Benoit Boissinot, Alain Darte, Benoît Dupont de Dinechin, and Fabrice Rastello. Computing Liveness Sets for SSA-Form Programs. Research Report RR-7503, INRIA, April 2011. [WWW]


  5. Florian Brandner and Quentin Colombet. Parallel Copy Elimination on Data Dependence Graphs. Research Report RR-7735, INRIA, September 2011. [WWW]


  6. Paul Feautrier. Simplification of Boolean Affine Formulas. Technical report RR-7689, INRIA, July 2011. [PDF]


2009
  1. Benoit Boissinot, Philip Brisk, Alain Darte, and Fabrice Rastello. SSI Revisited. Technical report RR2009-24, LIP, July 2009. [WWW]


2007
  1. Christophe Alias, Fabrice Baray, and Alain Darte. Lattice-Based Array Contraction: from Theory to Practice. Research Report 2007-44, INRIA, November 2007.


  2. Benoit Boissinot, Sebastion Hack, Daniel Grund, Benoît Dupont de Dinechin, and Fabrice Rastello. Fast Liveness Checking for SSA-Form Programs. Technical report RR2007-45, LIP, ENS-Lyon, France, September 2007. [WWW]


  3. Florent Bouchez, Alain Darte, and Fabrice Rastello. Improvements to Conservative and Optimistic Register Coalescing. Technical report RR2007-41, LIP, ENS-Lyon, France, March 2007. [WWW]


  4. Florent Bouchez, Alain Darte, and Fabrice Rastello. On the Complexity of Spill Everywhere under SSA Form. Technical report RR2007-42, LIP, ENS-Lyon, France, March 2007. [WWW]


  5. Paul Feautrier. Elementary Transformation Analysis for Array-OL. Research Report 6193, INRIA, May 2007. [WWW]


2006
  1. Florent Bouchez, Alain Darte, and Fabrice Rastello. On the Complexity of Register Coalescing. Technical report RR2006-15, LIP, ENS-Lyon, France, March 2006. [WWW]


  2. Florent Bouchez, Alain Darte, and Fabrice Rastello. Register Allocation: What does Chaitin's NP-Completeness Proof Really Prove?. Technical report RR2006-13, LIP, ENS-Lyon, France, March 2006. [WWW]


  3. Nicolas Fournel, Antoine Fraboulet, and Paul Feautrier. Booting and Porting Linux and uClinux on a New Platform. Technical report RR2006-08, ENSL/LIP, February 2006. Note: 38 pages.


  4. Nicolas Fournel, Antoine Fraboulet, and Paul Feautrier. Embedded Systems Energy Characterization using non-Intrusive Instrumentation. Research Report 2006-37, LIP, ENS-Lyon, November 2006. Note: 34 pages.


  5. Nicolas Fournel, Antoine Fraboulet, and Paul Feautrier. Porting the Mutek Operating System to ARM Platforms. Research Report 2006-12, LIP, ENS-Lyon, February 2006. Note: 34 pages.


2005
  1. Florent Bouchez, Alain Darte, Christophe Guillon, and Fabrice Rastello. Register Allocation and Spill Complexity under SSA. Technical report RR2005-33, LIP, ENS Lyon, France, August 2005. [WWW]


  2. Hadda Cherroun, Alain Darte, and Paul Feautrier. Scheduling with Resource Constraints using Dis-Equations. Technical report 2005-40, LIP, ENS-Lyon, September 2005.


  3. Alain Darte, Steven Derrien, and Tanguy Risset. Hardware/Software Interface for Multi-Dimensional Processor Arrays. Technical report 2005-15, LIP, ENS-Lyon, April 2005.


  4. Fabrice Rastello, Francois de Ferrière, and Christophe Guillon. Optimizing the Translation Out-of-SSA with Renaming Constraints. Technical report RR2005-34, LIP, ENS Lyon, France, August 2005. [WWW]


  5. Antoine Scherrer, Antoine Fraboulet, and Tanguy Risset. Analysis and Synthesis of Cycle-Accurate On-Chip Traffic with Long-Range Dependence. Technical report 2005-53, LIP, ENS-Lyon, December 2005.


  6. Antoine Scherrer, Nicolas Larrieu, Philippe Owezarski, and Patrice Abry. Non Gaussian and Long Memory Statistical Characterisations for Internet Traffic with Anomalies. Technical report 2005-35, LIP, ENS-Lyon, September 2005.


2004
  1. Thierry Bidault, Christophe Guillon, Florent Bouchez, and Fabrice Rastello. Procedure Placement using Temporal-Ordering Information: Dealing with Code Size Expansion. Technical report RR-04-16, LIP, ENS Lyon, France, April 2004. [WWW]


  2. Alain Darte and Rob Schreiber. Nested Circular Arc Families: A Model for Barrier Placement in Single-Program, Multiple-Data Codes with Nested Loops. Technical report RR2004-57, LIP, ENS-Lyon, December 2004.


  3. Alain Darte, Rob Schreiber, and Gilles Villard. Lattice-Based Memory Allocation. Technical report RR2004-23, LIP, ENS-Lyon, April 2004.


2003
  1. Fabrice Rastello, Francois de Ferrière, and Christophe Guillon. Optimizing the Translation Out-of-SSA with Renaming Constraints. Technical report RR2003-35, LIP, ENS Lyon, France, June 2003.


2002
  1. Alain Darte and Guillaume Huard. New Complexity Results on Array Contraction and Related Problems. Technical report RR2002-41, LIP, ENS-Lyon, France, October 2002.


  2. Alain Darte and Guillaume Huard. New Results on Array Contraction. Technical report RR2002-17, LIP, ENS-Lyon, France, April 2002.


2001
  1. Pierre Amiranoff, Albert Cohen, and Paul Feautrier. Variables d'induction généralisées pour l'analyse par instance de programmes récursifs. Technical report 4252, INRIA, September 2001.


  2. Daniel Chavarría-Miranda, Alain Darte, Robert Fowler, and John Mellor-Crummey. Efficient Parallelization of Line-Sweep Computations. Technical report RR2001-45, LIP, ENS-Lyon, France, November 2001.


  3. Benoît Dupont de Dinechin, Christophe MONAT, and Fabrice Rastello. Parallel Execution of the Saturated Reductions. Technical report RR-01-28, LIP, ENS Lyon, France, July 2001. [WWW]


  4. Fabien Feschet, Antoine Fraboulet, and Stéphane Bonnevay. Regularity of Digital Lines. Technical report, Université Lyon 1, 2001. Note: 10 pages.[PDF]


  5. Fabrice Rastello and Thierry Dauxois. Parallelization of the Numerical Lyapunov Calculation for the Fermi-Pasta-Ulam Chain.. Technical report RR-01-42, LIP, ENS Lyon, France, November 2001. [WWW]


2000
  1. Olivier Beaumont, Vincent Boudet, Arnaud Legrand, Fabrice Rastello, and Yves Robert. Heterogeneity Considered Harmful to Algorithm Designers. Technical report RR-00-24, LIP, ENS Lyon, France, June 2000. [WWW]


  2. Olivier Beaumont, Vincent Boudet, Fabrice Rastello, and Yves Robert. Matrix-Matrix Multiplication on Heterogeneous Platforms. Technical report RR-00-02, LIP, ENS Lyon, France, January 2000. [WWW]


  3. Olivier Beaumont, Vincent Boudet, Fabrice Rastello, and Yves Robert. Partitioning a Square into Rectangles: NP-completeness and Approximation Algorithms. Technical report RR-00-10, LIP, ENS Lyon, France, February 2000. [WWW]


  4. Olivier Beaumont, Arnaud Legrand, Fabrice Rastello, and Yves Robert. Dense Linear Algebra Kernels on Heterogeneous Platforms: Redistribution Issues. Technical report RR-00-45, LIP, ENS Lyon, France, December 2000. [WWW]


  5. Olivier Beaumont, Arnaud Legrand, Fabrice Rastello, and Yves Robert. Static LU Decomposition on Heterogeneous Platforms. Technical report RR-00-44, LIP, ENS Lyon, France, December 2000. [WWW]


  6. D. Cachera, S. Rajopadhye, T. Risset, and C. Tadonki. Parallelization of the Algebraic Path Problem on Linear SIMD/SPMD Arrays. Technical report 1346, Irisa, 2000. [WWW]


  7. Alain Darte and Guillaume Huard. Loop Shifting for Loop Parallelization. Technical report RR2000-22, LIP, ENS-Lyon, France, May 2000.


  8. Paul Feautrier. Automatic Distribution of Data and Computations. Technical report 2000/3, PRiSM, March 2000.


  9. S.P.K. Nookala and T. Risset. A Library for Z-polyhedral Operations. Technical report 1330, Irisa, 2000. [WWW]


1999
  1. F. Bardoult, P. Quinton, S. Rajopadhye, and T. Risset. Synthesis of Data-Flow Interfaces for Regular Parallel Programs. Technical report 1260, Irisa, September 1999. [WWW]


  2. Vincent Boudet, Antoine Petitet, Fabrice Rastello, and Yves Robert. Data Allocation Strategies for Dense Linear Algebra Kernels on Heterogeneous Two-dimensional Grids. Technical report RR-99-31, LIP, ENS Lyon, France, 1999. [WWW]


  3. Vincent Boudet, Fabrice Rastello, and Yves Robert. A Proposal for an Heterogeneous Cluster ScaLAPACK (Dense Linear Solvers). Technical report RR-99-17, LIP, ENS Lyon, France, 1999. [WWW]


  4. Vincent Boudet, Fabrice Rastello, and Yves Robert. Algorithmic Issues for (Distributed) Heterogeneous Computing Platforms. Technical report RR-99-19, LIP, ENS Lyon, France, 1999. [WWW]


  5. Alain Darte and Guillaume Huard. Loop Shifting for Loop Compaction. Technical report RR1999-29, LIP, ENS-Lyon, France, May 1999.


  6. Alain Darte and Rob Schreiber. A Constructive Solution to the Juggling Problem in Systolic Array Synthesis. Technical report RR1999-15, LIP, ENS-Lyon, France, February 1999.


  7. F. Dupont de Dinechin, P. Quinton, S. Rajopadhye, and T. Risset. First Steps in Alpha. Technical report 1244, Irisa, 1999. [WWW]


1998
  1. Vincent Boudet, Fabrice Rastello, and Yves Robert. Alignment and distribution is NOT(always) NP-hard. Technical report RR-98-30, LIP, ENS Lyon, France, 1998. [WWW]


  2. Pierre Boulet, Jack Dongarra, Fabrice Rastello, Yves Robert, and Frédéric Vivien. Algorithmic Issues for Heterogeneous Computing Platforms. Technical report RR-98-49, LIP, ENS Lyon, France, 1998. [WWW]


  3. Alain Darte. On the Complexity of Loop Fusion. Technical report RR1998-50, LIP, ENS-Lyon, France, October 1998.


  4. Alain Darte and Georges-André Silber. The Nestor Library: A Tool for Implementing Fortran Source to Source Transformations. Technical report RR1998-42, LIP, ENS-Lyon, France, September 1998.


  5. Fabrice Rastello, Amit Rao, and Santosh Pande. Task Ordering in Linear Tiles. Technical report RR-98-11, LIP, ENS Lyon, France, 1998. [WWW]


  6. Fabrice Rastello and Yves Robert. Loop Partitioning versus Tiling for Cache-Based Multiprocessors. Technical report RR-98-13, LIP, ENS Lyon, France, February 1998. [WWW]


1997
  1. Pierre Boulet, Alain Darte, Georges-André Silber, and Frédéric Vivien. Loop Parallelization Algorithms: From Parallelism Extraction to Code Generation. Technical report RR97-17, LIP, ENS-Lyon, France, June 1997.


  2. Alain Darte. Mathematical Tools for Loop Transformations: From Systems of Uniform Recurrence Equations to the Polytope Model. Technical report RR97-26, LIP, ENS-Lyon, France, September 1997.


  3. Frédéric Desprez, Jack Dongarra, Fabrice Rastello, and Yves Robert. Determining the Idle Time of a Tiling. Technical report RR-97-35, LIP, ENS Lyon, France, 1997. [WWW]


  4. T. Risset, F. Dupont de Dinechin, and S. Robert. Structured Scheduling of Recurrence Equations. Technical report 1140, IRISA, 1997. [WWW]


1996
  1. Pierre-Yves Calland, Alain Darte, Yves Robert, and Frédéric Vivien. On the Removal of Anti and Output Dependences. Technical report RR96-04, LIP, ENS-Lyon, France, February 1996.


  2. Pierre-Yves Calland, Alain Darte, Yves Robert, and Frédéric Vivien. Plugging Anti and Output Dependence Removal Techniques into Loop Parallelization Algorithms. Technical report RR96-13, LIP, ENS-Lyon, France, June 1996.


  3. A. Darte, F. Desprez, J.-C. Mignot, T. Brandes, S. Chaumette, M.-C. Counilh, and J. Roman. A Set of Integrated Tools for the Parallelization of Applications Using High Performance Fortran. Technical report RR96-28, LIP, ENS-Lyon, France, September 1996.


  4. Alain Darte, Georges-André Silber, and Frédéric Vivien. Combining Retiming and Scheduling Techniques for Loop Parallelization and Loop Tiling. Technical report RR96-34, LIP, ENS-Lyon, France, November 1996.


  5. Alain Darte and Frédéric Vivien. On the Optimality of Allen and Kennedy's Algorithm for Parallelism Detection in Nested Loops. Technical report RR96-05, LIP, ENS-Lyon, France, February 1996.


  6. Alain Darte and Frédéric Vivien. Optimal Fine and Medium-Grain Parallelism Detection in Polyhedral Reduced Dependence Graphs. Technical report RR96-06, LIP, ENS-Lyon, France, April 1996.


1995
  1. Pierre-Yves Calland, Alain Darte, and Yves Robert. A New Guaranteed Heuristic for the Software Pipelining Problem. Technical report RR95-42, LIP, ENS-Lyon, France, November 1995.


  2. Alain Darte, Michèle Dion, and Yves Robert. A Characterization of One-to-One Modular Mappings. Technical report RR95-09, LIP, ENS-Lyon, France, April 1995.


  3. Alain Darte and Frédéric Vivien. A Comparison of Nested Loops Parallelization Algorithms. Technical report RR95-11, LIP, ENS-Lyon, France, May 1995.


1994
  1. Vincent Bouchitté, Pierre Boulet, Alain Darte, and Yves Robert. Evaluating Array Expressions on Massively Parallel Machines with Communication/Computation Overlap. Technical report RR94-10, LIP, ENS-Lyon, France, March 1994.


  2. Alain Darte and Frédéric Vivien. Automatic Parallelization Based on Multi-Dimensional Scheduling. Technical report RR94-24, LIP, ENS-Lyon, France, September 1994.


1993
  1. Pierre Boulet, Alain Darte, Tanguy Risset, and Yves Robert. (Pen)-Ultimate Tiling?. Technical report RR93-36, LIP, ENS-Lyon, November 1993.


  2. Alain Darte and Yves Robert. A Graph-Theoretic Approach to the Alignment Problem. Technical report RR93-20, LIP, ENS-Lyon, France, July 1993.


  3. Alain Darte and Yves Robert. Mapping Uniform Loop Nests onto Distributed Memory Architectures. Technical report RR93-03, LIP, ENS-Lyon, France, January 1993.


1992
  1. Alain Darte. Affine-by-Statement Scheduling: Extensions for Affine Dependences and Several Parameters. Technical report RT92-03, LIP, ENS-Lyon, France, May 1992.


  2. Alain Darte and Yves Robert. Affine-by-Statement Scheduling of Uniform Loop Nests over Parametric Domains. Technical report RR92-16, LIP, ENS-Lyon, France, April 1992.


  3. Alain Darte and Yves Robert. Scheduling Uniform Loop Nests. Technical report RR92-10, LIP, ENS-Lyon, France, February 1992.


1991
  1. Alain Darte. Regular Partitioning for Synthesizing Fixed-Size Systolic Arrays. Technical report RR91-10, LIP, ENS-Lyon, France, 1991.


  2. Alain Darte. Two Heuristics for Task Scheduling. Technical report RR91-30, LIP, ENS-Lyon, France, 1991.


  3. Alain Darte, Leonid Khachiyan, and Yves Robert. Linear Scheduling is Nearly Optimal. Technical report RR91-35, LIP, ENS-Lyon, France, 1991.


  4. Alain Darte, Tanguy Risset, and Yves Robert. Synthesizing Systolic Arrays: Some Recent Developments. Technical report RR91-09, LIP, ENS-Lyon, France, 1991.


1990
  1. Alain Darte and Jean-Marc Delosme. Partitioning for Array Processors. Technical report RR90-23, LIP, ENS-Lyon, France, 1990.



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Last modified: Tue Dec 30 15:51:02 2014
Author: darte.

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