1. Benoit Boissinot. Towards an SSA-based Compiler Back-end: Some Interesting Properties of SSA and Its Extensions. PhD thesis, École normale supérieure de Lyon, September 2010.



2. Alexandru Plesco. Program Transformations and Memory Architecture Optimizations for High-Level Synthesis of Hardware Accelerators. PhD thesis, École normale supérieure de Lyon, September 2010.

1. Christophe Alias, Alain Darte, Paul Feautrier, and Laure Gonnord. Multi-dimensional Rankings, Program Termination, and Complexity Bounds of Flowchart Programs. In 17th International Static Analysis Symposium (SAS'10), Perpignan, France, pages 117-133, September 2010. ACM press.



2. Christophe Alias, Alain Darte, and Alexandru Plesco. Optimizing DDR-SDRAM Communications at C-Level for Automatically-Generated Hardware Accelerators. An Experience with the Altera C2H HLS Tool. In 21st IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP'10), Rennes, France, pages 329-332, July 2010. IEEE Computer Society.



3. Florent Bouchez, Quentin Colombet, Alain Darte, Christophe Guillon, and Fabrice Rastello. Parallel Copy Motion. In 13th International Workshop on Software & Compilers for Embedded Systems (SCOPES'10), St. Goar, Germany, pages 1-10, June 2010. ACM Press.



4. Florian Brandner. Completeness of Automatically Generated Instruction Selectors. In 21st International Conference on Application-specific Systems Architectures and Processors (ASAP'10), Rennes, France, pages 175-182, July 2010. IEEE Computer Society.



5. Florian Brandner, Viktor Pavlu, and Andreas Krall. Execution Models for Processors and Instructions. In 28th Norchip Conference (NORCHIP'10), November 2010.



6. Alain Darte. Understanding Loops: The Influence of the Decomposition of Karp, Miller, and Winograd. In 8th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE'10), Grenoble, France, pages 139-148, July 2010. IEEE Computer Society. Note: Invited paper.



7. Boubacar Diouf, Albert Cohen, Fabrice Rastello, and John Cavazos. Split Register Allocation: Linear Complexity Without the Performance Penalty. In International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC'10), volume 5952 of Lecture Notes in Computer Science, pages 66-80, January 2010. Springer Verlag.



8. Paul Feautrier and Laure Gonnord. Accelerated Invariant Generation for C Programs with Aspic and C2fsm. In Workshop on Tools for Automatic Program Analysis (TAPAS'10), volume 267 of Electronic Notes in Theoretical Computer Science, pages 3-13, September 2010. [doi:10.1016/j.entcs.2010.09.014]

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