Our objective is to provide for the
Myrinet [BCF
95, Myr95, SBSS93, LS92, FDCF94]
network a basic interface for message-passing, targeted towards
parallel computing. Of course there are standard API well established:
MPI [SOHL95] and PVM [GBD94], but to begin with we choose to
implement our own simpler interface: BIP (for Basic Interface for
Parallelism). One of BIP main goal is to really achieve the maximal
performance of the hardware, but with a sufficient abstraction level,
to hide the hardware details.
Currently BIP messages has only been implemented for cluster of x86/Linux workstations, linked by Myrinet boards with the LANAI4.1 processor.
The base principle of BIP messages is to implement all communication
in a user-level library with zero-memory copies and direct access the
network hardware without system calls. Our current implementation
achieves less than 5 microseconds latency for small messages and more
than 125Mbytes/s bandwidth (so more than 1Gigabit/s if you take
Giga=
).