Team presentation

Compsys is a common research project-team of LIP (Laboratoire de l’Informatique du Parallélisme) and Inria. The team is located at Ecole normale supérieure de Lyon (ENS Lyon) in Lyon, France.

The goal of Compsys is to develop compilation techniques, more precisely code analysis and code optimization techniques, for programming or designing embedded computing systems. Compsys focuses on both low-level (back-end) optimizations for embedded processors and high-level (front-end, mainly source-to-source) transformations, in particular for high-level synthesis of hardware accelerators. Recent activities also include a shift towards compilation for programmable hardware accelerators and the analysis of parallel languages, in particular streaming languages. The main characteristic of Compsys is its focus on combinatorial optimization problems (graph algorithms, linear programming, polyhedral optimizations) coming from code optimization problems (register allocation, memory optimization, scheduling, automatic generation of interfaces, etc.) and the validation of these techniques in the development of compilation tools.

Research themes:

  • Program analysis and transformations (mainly at source level) for the compilation towards or the high-level synthesis of hardware accelerators. Specification of communicating processes, interface generation, memory optimizations, communication optimizations, code generation.
  • Code generation and optimizations (mainly back-end optimizations) for embedded processors. Aggressive and just-in-time optimizations (e.g., register allocation), intermediate representations (e.g., static single assignment form), program analysis.
  • Development of optimization tools (mainly polyhedral optimizations) for scheduling, code analysis, memory optimizations, simplifications of affine expressions.

Keywords: Compilation, Embedded computing systems, code analysis, code transformations, code optimizations, aggressive and just-in-time compilation, high-level synthesis.

Synthesis report for 2012 Inria evaluation: more information can be found in the following synthesis report.