1. Cédric Bastoul and Paul Feautrier. Adjusting a Program Transformation for Legality. Parallel Processing Letters, 15(1-2):3-17, March-June 2005.



2. Alain Darte and Guillaume Huard. New Complexity Results on Array Contraction and Related Problems. Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology, 40(1):35-55, May 2005.



3. Alain Darte, Robert Schreiber, and Gilles Villard. Lattice-Based Memory Allocation. IEEE Transactions on Computers, 54(10):1242-1257, October 2005. Note: Special Issue, Tribute to B. Ramakrishna (Bob) Rau.



4. Christophe Guillon, Fabrice Rastello, Thierry Bidault, and Florent Bouchez. Procedure Placement using Temporal-Ordering Information: Dealing with Code Size Expansion. Journal of Embedded Computing, 1(4):437-459, 2005.

1. Christophe Alias. TeMa: an Efficient Tool to find High-Performance Library Patterns in Source Code. In International Workshop on Patterns in High-Performance Computing, 2005.



2. Christophe Alias and Denis Barthou. Deciding Where to Call Performance Libraries. In International IEEE/ACM Euro-Par Conference, 2005.



3. Christophe Alias and Denis Barthou. On Domain Specific Languages Re-Engineering. In International ACM Conference on Generative Programming and Component-based Engineering, 2005.



4. Alain Darte, Steven Derrien, and Tanguy Risset. Hardware/Software Interface for Multi-Dimensional Processor Arrays. In IEEE International Conference on Application-Specific Systems, Architecture, and Processors (ASAP'05), pages 28-35, 2005. IEEE Computer Society Press.



5. Alain Darte and Robert Schreiber. A Linear-Time Algorithm for Optimal Barrier Placement. In ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP'05), Chicago, IL, USA, pages 26-35, June 2005.

1. Florent Bouchez, Alain Darte, Christophe Guillon, and Fabrice Rastello. Register Allocation and Spill Complexity under SSA. Technical report RR2005-33, LIP, ENS Lyon, France, August 2005. [WWW]



2. Hadda Cherroun, Alain Darte, and Paul Feautrier. Scheduling with Resource Constraints using Dis-Equations. Technical report 2005-40, LIP, ENS-Lyon, September 2005.



3. Alain Darte, Steven Derrien, and Tanguy Risset. Hardware/Software Interface for Multi-Dimensional Processor Arrays. Technical report 2005-15, LIP, ENS-Lyon, April 2005.



4. Fabrice Rastello, Francois de Ferrière, and Christophe Guillon. Optimizing the Translation Out-of-SSA with Renaming Constraints. Technical report RR2005-34, LIP, ENS Lyon, France, August 2005. [WWW]



5. Antoine Scherrer, Antoine Fraboulet, and Tanguy Risset. Analysis and Synthesis of Cycle-Accurate On-Chip Traffic with Long-Range Dependence. Technical report 2005-53, LIP, ENS-Lyon, December 2005.



6. Antoine Scherrer, Nicolas Larrieu, Philippe Owezarski, and Patrice Abry. Non Gaussian and Long Memory Statistical Characterisations for Internet Traffic with Anomalies. Technical report 2005-35, LIP, ENS-Lyon, September 2005.

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