A VHDL Library of Parametrisable Floating-Point and LNS Operators for FPGA

This page presents FPLibrary, a VHDL library of hardware operators for the floating-point (FP) and the logarithm (LNS) number systems, developped in the Arénaire project, at ENS Lyon.

Downloading

FPLibrary operators can be downloaded from here. This directory contains several tar-gzipped archive containing VHDL source code.

• FPLibrary contains the core operators (+,*,/, square root) for floating-point and LNS; Pipelined versions are available;
• fp_exp_tb and fp_log_tb contains table-based floating-point exponential and logarithm operators (up to single precision); Pipelined versions are available;
• fp_sin_cos_tb contains table-based floating-point sine and cosine operators (lower latency, up to single precision); No pipelined versions is available;
• fp_exp_it and fp_log_it contains iterative floating-point exponential and logarithm operators (lower area, up to double precision); No pipeline is available.

More detailed instructions, including detailed setup instructions for Xilinx ISE, can be found in the pdf document here.

Extract the archive with:

tar xzvf FPLibrary-0.94.tgz

The resulting directory should have the following structure:

FPLibrary-0.9/doc/		contains this file
FPLibrary-0.9/vhdl/		contains the code for the main package
FPLibrary-0.9/vhdl/fp/		contains the code for all the FP operators
FPLibrary-0.9/vhdl/lns/		contains the code for all the LNS operators
FPLibrary-0.9/vhdl/conv/		contains the code for the conversion operators (support for IEEE-754, FP and LNS formats)
FPLibrary-0.9/vhdl/misc/		contains some components shared by the operators

1. Getting started

1.1. Using the library in your own designs

To use the library, you first have to pre-compile it. Its working library has to be fplib.

Then, you just have to specify in the declaration of your entities that you need to include this library. This can be done by adding these two lines:

library fplib;
use fplib.pkg_fplib.all;

You can now instantiate any of the operators provided by FPLibrary in your designs.

1.2. Provided operators

FPLibrary provides the following operators:

Arithmetic operators:
Add		combinatorial addition/subtraction operator
Add_Clk		pipelined addition/subtraction operator
Mul		combinatorial multiplication operator
Mul_Clk		pipelined multiplication operator
Div		combinatorial division operator
Div_Clk		pipelined division operator
Sqrt		combinatorial square root operator
Sqrt_Clk		pipelined square root operator
Conversion operators:
IEEE754_To_FP		conversion from IEEE-754 format to internal FP format
IEEE754_To_LNS		conversion from IEEE-754 format to internal LNS format
FP_To_IEEE754		conversion from internal FP format to IEEE-754 format
LNS_To_IEEE754		conversion from internal LNS format to IEEE-754 format

1.3. Operator instantiation

1.3.1. Arithmetic operators

With Op one of Add, Mul, Div or Sqrt, we have:

Combinatorial operators:

component Op is   generic ( fmt : format;             wE  : positive := 6;             wF  : positive := 13 );   port ( nA : in  std_logic_vector(wE+wF+2 downto 0);          nB : in  std_logic_vector(wE+wF+2 downto 0);          nR : out std_logic_vector(wE+wF+2 downto 0) ); end component;

Pipelined operators:

component Op_Clk is   generic ( fmt : format;             wE  : positive := 6;             wF  : positive := 13 );   port ( nA  : in  std_logic_vector(wE+wF+2 downto 0);          nB  : in  std_logic_vector(wE+wF+2 downto 0);          nR  : out std_logic_vector(wE+wF+2 downto 0);          clk : in  std_logic ); end component;

(N.B.: the nB operand is not defined for square root operators.)

The fmt generic parameter has to be either FP to instantiate an FP operator or LNS to instantiate an LNS operator. This allows to change the number format of a whole circuit by changing only one parameter.

The wE and wF generic parameters directly determines the range and the precision of the numbers the operator will use:

• for FP operators, wE is the size in bits of the exponent and wF the size in bits of the significand;
• for LNS operators, wE and wF are the size in bits respectively of the integer and fractional parts of the fixed-point logarithm.

nA (and nB whenever available) is (are) the input port(s) for the operand(s) of the considered operator.

nR is the output port for the result of the considered operator.

For pipelined operators, clk is the clock port.

1.3.2. Conversion operators

With Fmt one of FP or LNS, we have:

component IEEE754_To_Fmt is   generic ( wE : positive := 6;             wF : positive := 13 );   port ( nA  : in  std_logic_vector(wExp+wFrac downto 0);          nR  : out std_logic_vector(wExp+wFrac+2 downto 0) ); end component;

component Fmt_To_IEEE754 is   generic ( wE : positive := 6;             wF : positive := 13 );   port ( nA  : in  std_logic_vector(wExp+wFrac+2 downto 0);          nR  : out std_logic_vector(wExp+wFrac downto 0) ); end component;

The wE and wF generic parameters have the same meaning as for arithmetic operators.

nA and nR respectively are the input and output ports of the considered operator.

Miscellaneous

Do not hesitate to contact us (address at ens-lyon.fr) for more details.

These operators have been developped and tested using Xilinx ISE 5.2 and later / ModelSim XE II 5.6e and later.

This program is distributed under the GPL. See inside the archive for details.

Last modified: Mon Jul 31 09:02:43 CEST 2006